about
I am a GPU Architecture Engineer at NVIDIA. My opinions are my own and do not represent my employer. Previously I was a PhD student at University College London in the PPLV group. My PhD topic is “Detecting Relaxed Memory Concurrency Bugs in C and C++ Compilers”. My PhD was funded by Arm as part of an EPSRC iCase studentship, as supervised by James Brotherston, Earl Barr, and Lee Smith. Prior to this, I was a Compiler Engineer at Arm in Cambridge, where I worked on the Open Source LLVM compiler, Arm Compiler, and system validation/verification, and testing of compilers using executable architecture specifications, SMT solvers, and formal memory models. I obtained my Masters in Computer Science Masters from the University of Oxford and my Bachelors in Computer Science at the University of Nottingham.
Service
- CAV 2021: Artifact Evaluation Committee
- CAV 2022: Artifact Evaluation Committee
- CAV 2023: Artifact Evaluation Committee
- FoSSaCS 2024: Artifact Evaluation Committee
Awards
- EPSRC iCase PhD Studentship: 4-years industrial PhD co-funded by Arm